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     Product Description:


 
 

 

 

Cryptography IP Core

 

Our SHA-1 secure hash algorithm core is targeted for FPGAs from the leading FPGA and ASIC technology providers. It's a fast and efficient algorithm based on FIPS 180-1 standard that is vital for e-commerce, digital signature and secured wireless applications. Source code is also available for maximum adaptability and integration.

 


 

SHA-1 Secure HASH Algorithm Core     PDF

 

SHA-1 IP Core

The SHA-1 core implements the secure hash algorithm according to the federal Information processing standard FIPS PUB 180-1 by the National Institute of Standards and Technology NIST. The SHA-1 core is fast and efficient, it implements internal data padding and provides data read and write signals for easy interfacing to a 32-bit wide processing or storage unit. The standard specifies a secure hash algorithm for generating a compressed representation of a data message or file. The result of the computation is a 160 bit unique data, called message digest and represents an input message with a maximum length of 2^64 bits. The input message is processed in blocks of 512 bits.

 

Features

•  Meets FIPS 180-1 standard.

•  Fixed initial state according to FIPS 180-1 standard.

•  Provides internal data padding.

•  32-bit data interface for direct connectivity to 32-bit wide data bus systems. Alternate I/O interface

    package is also available. (SHA-1A)

•  Fast and efficient, executes the entire Hash calculations in only 82 clocks.

•  Fully Synchronous system

 

Applications

•  Secured data storage

•  E-commerce

•  Wireless communications

•  Authentication

•  Digital signature

 

 

 
 

 

 

Verification

The SHA-1 core has been functionally tested and verified using simulation techniques, test bench modules and test vectors suggested by NIST.
 

 

Alternate I/O Interface Package (SHA-1A)

An alternate version of the SHA-1 core is also available for applications where dedicated I/O buses are used to interface with the SHA-1 core and data is transferred at a low to high transition of the clock. The SHA-1A version does not support internal data padding.

 


 

 

Download the SHA-1 Data Sheet file in PDF format.

 

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